Nextpnr

Nextpnr is an open-source FPGA placement-and-routing tool used in design flows for several FPGA families. Its architecture support varies, and some backends are experimental.

6.4/10 TechZella Score
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6 key claims verifiedOur editorial team checked this profile against vendor documentation, product documentation. Supported by 3 documented sources.
Editorial overview

Aggregated Overview

The project documents multiple FPGA backends, a GUI option, command-line flows, and an architecture API. Building requires development dependencies and, for target families, separate architecture databases or tools. No reliable public product-review evidence was assessed.

This profile combines documented product information and independent evidence where available. It is not a hands-on test unless TechZella explicitly identifies one.

Overview

Nextpnr is an open-source tool for placing and routing FPGA designs. It is used within FPGA design flows and works with architecture-specific support projects. Its README lists established and experimental device-family backends, so users should check their exact target and the maturity of its backend.

The repository documents a Yosys-to-nextpnr flow for iCE40: Yosys synthesizes a design, nextpnr places and routes it, and separate tools generate and upload the bitstream. This makes nextpnr one component of a broader toolchain, not a complete device programming suite.

Decision guide

Nextpnr Decision Snapshot

A quick way to understand who this product may suit, where its limits matter, and which facts are most relevant before you compare alternatives.

Best suited to

FPGA developers who want an open-source placement-and-routing step for a supported device family and can assemble the matching synthesis and architecture-toolchain dependencies.

Look elsewhere if

Buyers who need a turnkey vendor-supported suite or support for an FPGA family not listed as supported should verify the full toolchain before choosing it, and should evaluate alternatives such as Arachne-PNR or VPR/VTR instead.

Platforms

Linux, macOS, Windows

TechZella assessment

6.4/10

Decision context

Nextpnr — What Sets It Apart?

These are the product-specific differences that may matter when deciding whether the software fits your workflow. They are based on documented evidence rather than a universal ranking.

  • One project provides placement-and-routing backends for several FPGA families, with architecture-specific support projects and a documented interface for custom architectures.
  • The project documents command-line and optional GUI workflows; the GUI is not enabled in a standard build.
Editorial assessment

Nextpnr Pros & Cons

Pros

  • Open-source software with an ISC license.
  • Targets several FPGA architecture families through distinct backends.
  • Documents command-line workflows and an optional GUI.
  • Documents an architecture API for custom backend work.

Cons

  • Build setup requires multiple development dependencies.
  • Device support relies on separate architecture projects or databases.
  • Some backends are experimental, and backend maturity varies.
  • The GUI is not enabled in the standard build.
Operational limits

Nextpnr Gotchas & Operational Limits

These are documented constraints or practical friction points that may matter before you adopt the product.

The GUI is not included in the default build.

Users expecting a graphical interface must enable the GUI build option and provide Qt6 and OpenGL dependencies.

Evidence source ↗

Pricing

The source repository identifies nextpnr as free and open-source software and links an ISC license. No commercial plans, subscription pricing, free-trial terms, or paid vendor support pricing were found in the reviewed project materials. Separate tools and architecture databases in a chosen FPGA workflow may have their own requirements or costs.

Cost context

Total Cost & Hidden Costs

Additional costs or implementation requirements that are documented in the available evidence.

Build and setup effort

The documented source build requires CMake, a C++17 compiler, Python, Boost and Eigen3; target-specific architecture projects or databases may also be needed. No onboarding service or implementation price was found in the reviewed project materials.

Evidence source ↗

Hosting or infrastructure

The reviewed project documents local installation rather than hosted service plans; no hosted infrastructure pricing was found.

Evidence source ↗

Licensing and ancillary tools

The repository identifies an ISC license. The documented iCE40 workflow also uses Yosys, IceStorm tools, and a board programmer; the project page does not provide prices for these separate components.

Evidence source ↗
Capabilities

Nextpnr Features

Placement and routing

  • Places and routes FPGA designs for supported architectures
  • Includes a command-line workflow
  • Provides an optional GUI build

Architecture support

  • Lists Lattice iCE40, ECP5 and Nexus support
  • Lists Gowin LittleBee and Aurora V, NanoXplore NG-Ultra and Cologne Chip GateMate support
  • Provides experimental backends for some additional architectures
  • Documents an architecture API and generic backend

Toolchain

  • README documents use with Yosys for synthesis
  • Target workflows may require separate architecture support projects and bitstream tools
Visual preview

Demo & Screenshots

Product details

Nextpnr Specifications

LicenseISC
Operating systemsWindows, Linux, macOS build instructions documented
InstallationBuild from source with CMake
GUIOptional; not enabled in the standard build
IntegrationYosys synthesis workflow and architecture-specific support projects
APIArchitecture API documented
Latest release verified0.11.1, released August 11, 2026
Deployment

Deployment & System Footprint

Verified installation, hosting, administration, or environment details that can affect implementation.

Installation or hostingSelf-built local software. The README documents source builds on Windows, Linux and macOS; this is not presented as a hosted service. Source ↗

Alternatives

The project README points to Arachne-PNR and VPR/VTR as other open-source FPGA place-and-route projects. These are potential evaluation alternatives, but their target-device coverage and workflow fit should be checked against the user’s particular FPGA; the reviewed sources do not provide a like-for-like feature or pricing comparison.

Our evidence-based assessment

TechZella Score

A proprietary editorial score based on product capabilities, usability, value, performance, support and user sentiment evidence.

6.4/10Moderate confidence
Features8.2
Ease of Use5.8
Value for Money9.0
Performance7.5
Support5.5
User Sentiment0.0

The project documents multiple FPGA backends, a GUI option, command-line flows, and an architecture API. Building requires development dependencies and, for target families, separate architecture databases or tools. No reliable public product-review evidence was assessed.

Methodology v1.0. The assessment weighs feature coverage (25%), ease of use (15%), value for money (20%), performance (15%), support (10%) and user sentiment (15%), using researched product evidence and verified review evidence where available. It is a TechZella editorial assessment, not a direct user-review average.

Editorial transparency

Our Review Methodology

Key claims are linked to the sources used to verify them. This evidence record is separate from third-party user ratings.

TechZella evaluates software using documented product capabilities, pricing information, usability and value considerations, independent user evidence where available, and competitive context. The assessment is an editorial review, not a hands-on test unless one is explicitly identified. Our editorial assessment is based on 3 documented sources.

What TechZella adds
  • One project provides placement-and-routing backends for several FPGA families, with architecture-specific support projects and a documented interface for custom architectures.
  • The project documents command-line and optional GUI workflows; the GUI is not enabled in a standard build.
Important limitations
  • Architecture coverage is uneven: some backends are explicitly experimental, and Cyclone V support is described as having limited testing and an API subject to change.
  • Building and using a target requires matching dependencies and architecture data; nextpnr alone is not a complete synthesis-to-programming flow.
Evidence-backed claims
Nextpnr performs FPGA placement and routing and is described as vendor-neutral and timing-driven.

The project README identifies nextpnr as a portable FPGA place-and-route tool with those stated aims.

View source ↗Verified 2026-11-10
The project lists support for Lattice iCE40, ECP5 and Nexus, Gowin, NanoXplore NG-Ultra and Cologne Chip GateMate families, alongside several experimental backends.

The README enumerates supported device families and labels Cyclone V, MachXO2, Xilinx 7-series and generic architecture support experimental.

View source ↗Verified 2026-11-10
Nextpnr includes a documented architecture API for backend development.

The project README links architecture API documentation, and the repository includes an architecture API document.

View source ↗Verified 2026-11-10
The README documents building on Windows, Linux and macOS.

The build prerequisites and platform-specific instructions include Windows with MSVC/vcpkg and macOS with Homebrew, alongside Linux package examples.

View source ↗Verified 2026-11-10
The optional GUI is not built by default and needs Qt6 and OpenGL.

The README describes the GUI as disabled in a standard build and specifies Qt6 and OpenGL for enabling it.

View source ↗Verified 2026-11-10
The project’s release page lists nextpnr 0.11.1, released August 11, 2026.

The GitHub releases page identifies version 0.11.1 and gives its release date.

View source ↗Verified 2026-11-10
Common questions

Nextpnr FAQs

Answers begin with the clearest available response, followed by the context that helps you act on it.

Is Nextpnr free to use?
The project describes itself as free and open-source software and links an ISC license. No separate paid plans were listed in the reviewed project materials.
Does Nextpnr work with Yosys?
Yes. The project documents a Yosys synthesis step that produces a JSON design for nextpnr placement and routing in its iCE40 example flow.
Does Nextpnr include a graphical interface?
It has an optional GUI, but the default build does not include it. The documented GUI build requires Qt6 and OpenGL.
Which operating systems can build Nextpnr?
The README provides build instructions for Windows, Linux and macOS. Build requirements differ by operating system and selected architecture.
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